module weight_scrambler #(
  parameter KEY_WIDTH = 128
)(
  input  wire                 clk,
  input  wire [KEY_WIDTH-1:0] dynamic_key,
  input  wire [31:0]          weight_in,
  output reg  [31:0]          weight_out
);

  // 轻量级加密算法
  always @(posedge clk) begin
    weight_out <= weight_in ^ {dynamic_key[31:0], dynamic_key[63:32]} ^
                 {dynamic_key[95:64], dynamic_key[127:96]};
  end

endmodule